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1

A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs

S. Matakias, Y. Tsiatouhas, A. Arapoyanni, Th. Haniotakis

Journal:

Journal of Electronic Testing

Year:

2004

Language:

english

File:

PDF, 682 KB

english, 2004

2

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - SRAM oriented memory sense amplifier design in 0.18 μm CMOS technology

Chrisanthopoulos, A., Tsiatouhas, Y., Arapoyanni, A., Haniotakis, Th.

Year:

2002

Language:

english

File:

PDF, 347 KB

english, 2002

3

A new technique for IDDQ testing in nanometer technologies

Y. Tsiatouhas, Y. Moisiadis, Th. Haniotakis, D. Nikolos, A. Arapoyanni

Journal:

Integration, the VLSI Journal

Year:

2002

Language:

english

File:

PDF, 194 KB

english, 2002

4

Device simulation of a n-DMOS cell with trench isolation

G Kamoulakos, Th Haniotakis, Y Tsiatouhas, J.-P Schoellkopf, A Arapoyanni

Journal:

Microelectronics Journal

Year:

2001

Language:

english

File:

PDF, 864 KB

english, 2001

5

[IEEE Technology of Integrated Systems in Nanoscale Era (DTIS) - Hammamet, Tunisia (2010.03.23-2010.03.25)] 5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era - A concurrent BIST architecture based on Monitoring Square Windows

Voyiatzis, I., Haniotakis, Th., Efstathiou, C., Antonopoulou, H.

Year:

2010

Language:

english

File:

PDF, 4.23 MB

english, 2010

6

Testable designs of one-count generators

TH. HANIOTAKIS A. PASCHALIS C. HALA,

Journal:

International Journal of Electronics

Year:

1998

Language:

english

File:

PDF, 285 KB

english, 1998

7

[IEEE Comput. Soc 9th International IEEE On-Line Testing Symposium - Kos Island, Greece (7-9 July 2003)] 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003. - A sense amplifier based circuit for concurrent detection of soft and timing errors in CMOS ICs

Tsiatouhas, Y., Matakias, S., Arapoyanni, A., Haniotakis, Th.

Year:

2003

Language:

english

File:

PDF, 312 KB

english, 2003

8

Hierarchical robust test generation for CMOS circuit stuck-open faults

TSIATOUHAS, Y., HANIOTAKIS, TH., NIKOLOS, D., PASCHALIS, A., HALATSIS, C.

Journal:

International Journal of Electronics

Year:

1997

Language:

english

File:

PDF, 220 KB

english, 1997

9

[IEEE Comput. Soc IEEE Computer Society Annual Symposium on VLSI - Lafayette, LA, USA (19-20 Feb. 2004)] IEEE Computer Society Annual Symposium on VLSI - Ultra fast and low cost parallel two-rail code checker targeting high fan-in applications

Matakias, S., Tsiatouhas, Y., Haniotakis, Th., Arapoyanni, A.

Year:

2004

Language:

english

File:

PDF, 245 KB

english, 2004

10

[IEEE 2005 12th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2005) - Gammarth (2005.12.11-2005.12.14)] 2005 12th IEEE International Conference on Electronics, Circuits and Systems - An embedded IDDQ testing circuit and technique

Matakias, S., Tsiatouhas, Y., Arapoyanni, A., Haniotakis, Th.

Year:

2005

Language:

english

File:

PDF, 2.60 MB

english, 2005

11

Domino CMOS SCD/SFS 2-out-of-3 and 1-out-of-3 code checkers

Haniotakis, Th., Tsiatouhas, Y., Efstathiou, C., Nikolos, D.

Journal:

International Journal of Electronics

Year:

2003

Language:

english

File:

PDF, 145 KB

english, 2003

12

[IEEE Comput. Soc 2002 3rd International Symposium on Quality Electronic Design - San Jose, CA, USA (18-21 March 2002)] Proceedings International Symposium on Quality Electronic Design - Extending the viability of I/sub DDQ/ testing in the deep submicron era

Tsiatouhas, Y., Haniotakis, Th., Nicolos, D., Arapoyanni, A.

Year:

2002

Language:

english

File:

PDF, 298 KB

english, 2002

13

[IEEE 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. - Grenoble, France (Sept. 12-16, 2005)] Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. - A built-in I/sub DDQ/ testing circuit

Matakias, S., Tsiatouhas, Y., Arapoyanni, A., Haniotakis, Th., Prenat, G., Mir, S.

Year:

2005

Language:

english

File:

PDF, 236 KB

english, 2005

14

[IEEE 2006 13th IEEE International Conference on Electronics, Circuits and Systems - Nice, France (2006.12.10-2006.12.13)] 2006 13th IEEE International Conference on Electronics, Circuits and Systems - A Pipeline Architecture Incorporating a Low-Cost Error Detection and Correction Mechanism

Floros, A., Tsiatouhas, Y., Arapoyanni, A., Haniotakis, Th.

Year:

2006

Language:

english

File:

PDF, 380 KB

english, 2006

15

Totally self-checking checkers for Borden codes

HANIOTAKIS, TH., NIKOLOS, D., PASCHALIS, A., GIZOPOULOS, D.

Journal:

International Journal of Electronics

Year:

1994

Language:

english

File:

PDF, 155 KB

english, 1994

16

[IEEE Comput. Soc Meeting on Design Automation and Test in Europe - Paris, France (27-30 March 2000)] Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) - A versatile built-in self test scheme for delay fault testing

Tsiatouhas, Y., Haniotakis, Th., Nikolos, D., Arapoyanni, A.

Year:

2000

File:

PDF, 57 KB

2000

17

[IEEE IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) - Tampa, FL, USA (11-12 May 2005)] IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) - The Use of Pre-Evaluation Phase in Dynamic CMOS Logic

Rao, A., Haniotakis, Th., Tsiatouhas, Y., Djemil, H.

Year:

2005

Language:

english

File:

PDF, 58 KB

english, 2005

18

[IEEE Comput. Soc 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Austin, TX, USA (2-4 Nov. 1998)] Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223) - C-testable one-dimensional ILAs with respect to path delay faults: theory and applications

Haniotakis, Th., Tsiatouhas, Y., Nikolos, D.

Year:

1998

Language:

english

File:

PDF, 63 KB

english, 1998

19

Path delay fault testing of multiplexer-based shifters

Vergos, H. T., Tsiatouhas, Y., Haniotakis, Th., Nikolos, D., Nicolaidis, M.

Journal:

International Journal of Electronics

Year:

2001

Language:

english

File:

PDF, 289 KB

english, 2001

20

[IEEE Sixth International Symposium on Quality of Electronic Design (ISQED'05) - San Jose, CA, USA (21-23 March 2005)] Sixth International Symposium on Quality of Electronic Design (ISQED'05) - Reduced Test Application Time Based on Reachability Analysis

Haniotakis, Th., Tragoudas, S., Pani, G.

Year:

2005

Language:

english

File:

PDF, 113 KB

english, 2005

21

[ACM Press the conference - Paris, France (2000.03.27-2000.03.30)] Proceedings of the conference on Design, automation and test in Europe - DATE '00 - A versatile built-in self test scheme for delay fault testing (poster paper)

Tsiatouhas, Y., Haniotakis, Th., Nikolos, D., Arapoyanni, A.

Year:

2000

Language:

english

File:

PDF, 62 KB

english, 2000

22

Design of stuck-open fault testable CMOS complex gates

Tsiatouhas, Y., Haniotakis, Th., Halatsis, C., Arapoyanni, A.

Journal:

Electronics Letters

Year:

1996

Language:

english

File:

PDF, 437 KB

english, 1996